How are instruction per cycle and processor speed related?
Does it mean increase in IPC(instruction per cycle) mean a increase in processor speed as well. Do half adder and full adder or 16 bit adders and multipliers in digital electronics build a processor, how does their speed area power affect processor’s speed area and power. Please also explain how do variable latency adders multipliers help or improve any of the things above. Please also explain average performance of variable latency unit.
The problem is not all instructions can be “simultaneously processed”. Branches, for example, makes a huge difference. There are “branch predictors” in CPU’s microcode to handle that, but then it’s not always right.
If you primarily deal with small numbers, like 8-bit or 16-bit stuff, then using a 32-bit or 64-bit CPU that’s not capable of handling multiple small numbers simultaneous (SIMD) will be somewhat of a waste of both clock cycles and power.
The rest, you have to figure it out from your textbook.